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* 0078-001-H102 (G$DR) DRAWING NO. 41285543-001-03 PAGE 2

0051 * 2 TO SATISFY ANY OUTSTANDING CALLS ON INPUT-OUTPUT LIBRARY 0052 * ROUTINES AND IGNORE OR ABORT ANY ATTEMPT TO USE THEM AT RUN 0053 * TIME. 0054 * 0055 * 0056 * RESTRICTIONS 0057 * 0058 * THIS PROGRAM WILL WORK ON ANY H316 OR H516 COMPUTER, WITH UP TO 0059 * 32 768 WORDS OF CORE STORE. IT IS WRITTEN IN UNIVERSAL MODE, 0060 * I.E. IT WILL WORK EQUALLY WELL WHETHER EXTENDED ADDRESSING IS 0061 * ENABLED OR NOT (SEE 'USE' BELOW). 0062 * 0063 * IF G$DR IS REQUIRED FOR PURPOSE 1 ABOVE, IT MUST BE LOADED AFTER 0064 * ALL OTHER SUBROUTINES. IN THIS CASE, CARE MUST BE TAKEN THAT 0065 * NEITHER WORD '42 NOR WORD '43 OF G$DR LIES IN THE FIRST LOCATION 0066 * OF A 4K MEMORY MODULE (I.E. IN LOCATION '10000, '20000, ETC.), 0067 * AS THIS WILL CAUSE A HALT ON THE FIRST G$DR CALL. ALSO FOR THIS 0068 * PURPOSE G$DR MUST NOT LIE IN SECTOR O OR SECTOR 1. 0069 * 0070 * IT SHOULD ALSO BE NOTED THAT G$DR ALTERS THE CURRENT BASE SECTOR. 0071 * 0072 * 0073 * STORAGE 0074 * 0075 * 56 (OCTAL) 0076 * 46 (DECIMAL) 0077 * 0078 * ALL BUT THE FIRST '26 (22) LOCATIONS ARE FREED WHEN G$DR IS FIRST 0079 * CALLED. IF THE PROGRAM IS NOT REQUIRED FOR PURPOSE 1 ABOVE, THE 0080 * LAST '30 (24) LOCATIONS MAY BE OVERWRITTEN AT LOAD-TIME. 0081 * 0082 * 0083 * TIMING 0084 * 0085 * G$DR: 11 CORE STORE CYCLES (EXCEPT THE FIRST TIME IT IS CALLED) 0086 * TABS ENTRIES: 16 CYCLES 0087 * SKP ENTRIES: 8 CYCLES 0088 * NOP ENTRIES: 5 CYCLES 0089 * ERNA ENTRIES: NOT APPLICABLE 0090 * INCLUDING THE CALL, ASSUMING NO DESECTORING TO BE NECESSARY. 0091 * 0092 * 0093 * USE 0094 * 0095 * LOADING PROCEDURE 0096 * 0097 * EXACT DETAILS CANNOT BE GIVEN HERE, BUT THE FOLLOWING 0098 * OBJECT MODULES SHOULD BE LOADED, IN ORDER, USING LDR-APM OR A 0099 * SIMILAR LOADER FOR A TYPICAL CASE: 0100 *